Ceramic electronic device and method of production of same

ABSTRACT

A method of production of a ceramic electronic device such as a multilayer ceramic capacitor, comprising forming a first ceramic coating layer on the surface of a substrate, forming an internal electrode on the surface of the first ceramic coating layer, then forming a second ceramic coating layer on the surface of the first ceramic coating layer so as to cover the internal electrode. In this case, when a mean particle size of ceramic particles of the first ceramic coating layer is α1, a thickness of the first ceramic coating layer is T1, a mean particle size of ceramic particles of the second ceramic coating layer is α2, and a thickness of the second ceramic coating layer is T2, the conditions of α1≦α2, 0.05&lt;α1≦0.35 μm, T1&lt;T2, and 0&lt;T1&lt;1.5 μm are satisfied. As a result, it is possible to provide a ceramic electronic device, in particular a multilayer ceramic capacitor, resistant to short-circuit defects, withstand voltage defects, and other structural defects.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a ceramic electronic device anda method of production of the same.

[0003] 2. Description of the Related Art

[0004] As one method for producing a capacitor, piezoelectric device, orother ceramic electronic device, there is known the method of forming aceramic coating in a sheet on a substrate by the doctor blade method toobtain a green sheet and forming electrode paste on top of this byscreen printing. In this case, the ceramic coating includes ceramicpowder, an organic binder, a plasticizer, a solvent, etc., while theelectrode paste includes palladium, silver, nickel, or other conductiveparticles.

[0005] When desiring to obtain a multilayer structure, green sheetsformed with the electrode paste layers are stacked to the desiredmultilayer structure and then cut by a press to obtain ceramic greenchips. The thus obtained ceramic green chips are processed to remove thebinder, then fired at 1000° C. to 1400° C. Silver, silver-palladium,nickel, copper, or other terminal electrodes are then formed on theobtained fired bodies to obtain the ceramic electronic devices.

[0006] In the above method of production, when producing for example amultilayer ceramic capacitor, to reduce the size and increase thecapacity, the technique is adopted of reducing the thickness of eachceramic coating layer and increasing the number of layers. For example,multilayer ceramic capacitors are being developed having over 800ceramic coating layers with thicknesses of about 3 μm.

[0007] In producing a ceramic electronic device such as a multilayerceramic capacitor, however, when forming an internal electrode, thegeneral practice in the past has been to coat a ceramic coating on thesurface of a tape-like substrate having flexibility to form the ceramiccoating layer, then print an internal electrode paste. The substrate hasbeen made of polyethylene terephthalate (PET) film etc.

[0008] The ceramic coating used is obtained by mixing an acrylic resinor butyral resin or other organic binder, an organic solvent, aplasticizer, and a ceramic powder.

[0009] The internal electrode paste is prepared using a resin serving asan organic binder dissolved in an organic solvent as a vehicle,dispersing in the vehicle an Ag, Pd, Ni, Cu, or other conductive metalpowder, and, in some cases, adding a diluent for adjusting theviscosity.

[0010] As the organic solvent in the vehicle, terpineol, methyl ethylketone, etc. is used. As the binder, ethyl cellulose, nitrocellulose, oranother cellulose-based resin or butyl methacrylatet methylmethacrylate, or another acrylic-based resin is used. Further, as thediluent, an aromatic hydrocarbon, a fatty acid hydrocarbon, etc. isused.

[0011] When printing an internal electrode paste of such a compositionon a ceramic coating layer coated on a substrate in accordance with theconventional method of production, however, the terpineol, methyl ethylketone, or other organic solvent contained in the internal electrodepaste ends up dissolving the acrylic resin, butyral resin, or otherorganic binder contained in the ceramic coating layer. This phenomenonis called “sheet attack”.

[0012] If sheet attack occurs, it becomes difficult to peel off theceramic coating layer from the substrate. Further, sometimes holes orwrinkles occur in the ceramic coating layer. If using such a ceramiccoating layer to produce a multilayer ceramic capacitor, short-circuitdefects where internal electrodes become connected will arise, withstandvoltage defects will arise, the targeted electrostatic capacity will nolonger be able to be obtained, or other critical defects are liable tooccur.

[0013] As a means to avoid this problem, there is the method of printingan internal electrode directly on the substrate, coating a ceramic pasteover this to form a ceramic coating layer, then peeling off the ceramiccoating layer together with the internal electrode from the surface ofthe substrate (for example, see Japanese Patent No. 2136761).

[0014] With this method, however, the adhesion of the internal electrodeand ceramic coating layer with respect to the substrate becomesstronger, so it becomes extremely difficult to peel off the ceramiccoating layer without damage (holes, wrinkles, tears, etc.)

[0015] It may also be considered to coat the surface of a substrate withan agent for facilitating peeling (hereinafter called a “peeling agent”)in advance and form the internal electrode and ceramic coating layer onthe surface of the peeling agent. In this case, the difficulty ofpeeling can probably be avoided.

[0016] When printing an internal electrode on the surface of a peelingagent, however, since the affinity between the two is low, the internalelectrode is subjected to an agglomerating action due to the surfacetension, the shape of the pattern of internal electrode ends up beingruined, and the desired characteristics can no longer be obtained.

SUMMARY OF THE INVENTION

[0017] An object of the present invention is to provide a multilayerceramic capacitor or other ceramic electronic device able to preventsheet attack and resistant to short-circuit defects, withstand voltagedefects, and other structural defects.

[0018] Another object of the present invention is to provide a method ofproduction of a high precision, high reliability ceramic electronicdevice able to remarkably reduce the difficulty in peeling andprobability of occurrence of defects in characteristics of the producteven if reducing the thickness of the ceramic coating layers.

[0019] Still another object of the present invention is to provide amethod of production of a ceramic electronic device remarkably reducingstep differences between layers due to the electrodes and improving thereliability.

[0020] Method of Production and Electronic Device According to FirstAspect of Invention

[0021] To achieve the above objects, a method of production of a ceramicelectronic device of a first aspect of the invention comprises the stepsof forming a first ceramic coating layer on the surface of a substrate,forming an internal electrode on the surface of the first ceramiccoating layer, and forming a second ceramic coating layer on the surfaceof the first ceramic coating layer so as to cover the internalelectrode, wherein, when a mean particle size of ceramic particles ofthe first ceramic coating layer is α1, a thickness of the first ceramiccoating layer is T1, a mean particle size of ceramic particles of thesecond ceramic layer is α2, and a thickness of the second ceramic layeris T2, the conditions of α1≦α2, 0.05<α1≦0.35 μm, T1<T2, and 0<T1<1.5 μmare satisfied.

[0022] Preferably, a stack of the first ceramic coating layer, theinternal electrode, and the second ceramic coating, layer is peeled fromthe substrate.

[0023] Preferably, a plurality of stacks peeled from the substrate aresuccessively stacked with the first ceramic coating layers and thesecond ceramic coating layers in contact.

[0024] By satisfying α1≦α2, it is possible to form a dense, high packingdensity first ceramic coating layer. Therefore, it is possible to avoidto a great extent pinholes in the ceramic layer, withstand voltagedefects, and other structural defects of the electronic device.

[0025] Further, by satisfying 0.05 μm<α1≦0.35 μm, it is possible toreduce sheet attack in the production process and reduce theshort-circuit defect rate and withstand voltage defect rate. Note thatif viewed just from the standpoint of forming a dense, high packingdensity first ceramic coating layer, a smaller mean particle size α1 isbetter, but if the mean particle size α1 becomes smaller than 0.05 μm,there is a tendency for the dispersibility in the ceramic coating at thetime of preparing the ceramic coating to deteriorate and for formationof a uniform ceramic coating layer to become impossible.

[0026] Further, by satisfying T1<T2, an increase in thickness due to thethickness T1 of the first ceramic coating layer can be avoided and anincrease in thickness of the capacity layer, that is, the ceramic layer(T1+T2), in for example a multilayer ceramic capacitor can be avoided toa great extent and therefore the acquired capacitance and otherelectrical characteristics can be secured.

[0027] Still further, by satisfying 0 μm<T1≦1.5 μm, it is possible toreduce the short-circuit defect rate and the withstand voltage defectrate due to sheet attack in the production process. If the thickness T1of the first ceramic coating layer becomes 1.5 μm or more, theshort-circuit defect rate will be lowered, but there will be a tendencyfor the withstand voltage defect rate to become higher. The thickness T1is the thickness of the ceramic coating layer before firing. When firingthe ceramic body, the thickness of the ceramic coating layer is reduced.Therefore, even after firing, the above thickness condition is alwayssatisfied.

[0028] In the method of production according to the present invention, afirst ceramic coating layer is formed on the surface of a substrate, aninternal electrode is printed on the surface of the first ceramiccoating layer, then a second ceramic coating layer is formed on thesurface of the substrate so as to cover the internal electrode.Therefore, it is possible to peel off a combined stack of the firstceramic coating layer, internal electrode, and second ceramic coatinglayer as a unit from the substrate. Accordingly, it is possible tohandle these layers etc. as a difficult-to-damage stack and avoid to agreat extent delamination, pinholes, withstand voltage defects, andother structural defects due to damage.

[0029] Further, since the first ceramic coating layer is formed on thesurface of the substrate and then an internal electrode is formed byprinting etc. on the surface of the first ceramic coating layer, whenpeeling the stack off from the substrate, the peeled surface of thefirst ceramic coating layer becomes a smooth flat surface. Further, thesecond ceramic coating layer fills the clearances between thepredetermined pattern of the internal electrode, so the surface of thesecond ceramic coating layer also becomes smooth. Therefore, by usingthis smooth surface as the stacking surface, it is possible to avoiddelamination, pinholes, withstand voltage defects, and other structuraldefects due to step differences.

[0030] Further, since the first ceramic coating layer is formed on thesurface of the substrate, then the internal electrode is printed on thesurface of the first ceramic coating layer, it is possible to coat apeeling agent on the substrate to facilitate the peeling of the firstceramic coating layer. Further, it is possible to reliably peel off evena very thin first ceramic coating layer of several micrometers from thesubstrate without causing damage, Therefore, it is possible to avoid toa great extent delamination, pinholes, withstand voltage defects, andother structural defects due to damage of the first ceramic coatinglayer at the time of peeling.

[0031] Further, since the internal electrode is formed on the firstceramic coating layer, unlike the case of printing internal electrodeson the surface of a peeling agent, the shape of the internal electrodewill not end up being ruined due to the surface tension.

[0032] Preferably, the ceramic coating is coated using an extrusion typecoating head. The amount of the ceramic coating fed is preferablycontrolled by a mass flowmeter and a fixed displacement pump. The methodof production according to the present invention is particularly suitedto a multilayer ceramic capacitor.

[0033] Preferably, α1<α2. By making α1<α2, the effects of the presentinvention are enhanced.

[0034] Preferably T1+T2≦6 μm, more preferably T1+T2≦4 μm. By settingsuch a range, it is possible to reduce the thickness between layers ofinternal electrodes while maintaining the effects of the presentinvention and contribute to an improvement in the electrostaticcapacitance.

[0035] According to the method of production of a ceramic electronicdevice of the first aspect of the present invention, it is possible toefficiently produce a ceramic electronic device according to the firstaspect of the present invention.

[0036] A ceramic electronic device according to the first aspect of thepresent invention has a ceramic body comprised of ceramic layers stackedtogether and a plurality of internal electrodes stacked inside theceramic body via the ceramic layers, wherein at least one of the ceramiclayers present between pairs of adjoining of internal electrodes is amultilayer structure of a first ceramic layer and a second ceramic layerand wherein, when the mean particle size of ceramic particles of thefirst ceramic layer is α1, a thickness of the first ceramic layer is T1,a mean particle size of ceramic particles of the second ceramic layer isα2, and a thickness of the second ceramic layer is T2, the conditions ofα1≦α2, 0.05 μm<α1≦0.35 um, T1<T2, and 0 μm<T1≦1.5 μm are satisfied.

[0037] Preferably, each of the ceramic layers present between pairs ofadjoining internal electrodes is a multilayer structure of a firstceramic layer and a second ceramic layer.

[0038] Alternatively, some of the ceramic layers present between pairsof adjoining internal electrodes may be formed of the single secondceramic layers alone.

[0039] Method of Production and Electronic Device According to SecondAspect of Invention

[0040] To achieve the above objects, a method of production of a ceramicelectronic device of a second aspect of the invention comprises thesteps of forming a first ceramic coating layer on the surface of asubstrate, forming an internal electrode on the surface of the firstceramic coating layer, forming a second ceramic coating layer on thesurface of the first ceramic coating layer so as to cover the internalelectrode, forming other internal electrode of a different layer on thesurface of the second ceramic coating layer, forming a third ceramiccoating layer on the surface of the second ceramic coating layer so asto cover the other internal electrode to thereby form a stack, andpeeling off the stack from the substrate and successively stacking aplurality of peeled off stacks so that a first ceramic coating layercontained in one stack among two adjoining stacks contacts a thirdceramic coating layer contained in the other stack, wherein, when a meanparticle size of ceramic particles of the first ceramic coating layer isα1, a thickness of the first ceramic coating layer is T1, a meanparticle size of ceramic particles of the second ceramic coating layeris α2, a thickness of the second ceramic coating layer is T2, a meanparticle size of ceramic particles of the third ceramic coating layer isα3, and a thickness of the third ceramic coating layer is T3, theconditions of α1≦α2, α1≦α3, 0.05 μm<α1≦0.35 μm, T1<T2, T1<T3, and 0μm<T1≦1.5 μm are satisfied.

[0041] By satisfying α1≦α2 and α1 ≦α3 it is possible to effectivelyavoid pinholes, withstand voltage defects, and other structural defects.

[0042] Further, by satisfying 0.05 μm<α1≦0.35 μm, it is possible toreduce sheet attack in the production process and reduce theshort-circuit defect rate and withstand voltage defect rate.

[0043] Further, by satisfying T1<T2 and T1<T3, an increase in thicknessdue to the thickness T1 of the first ceramic layer can be avoided to agreat extent and the acquired capacity and other electricalcharacteristics of for example a ceramic capacitor can be secured.

[0044] Further, by satisfying 0 μm<T1≦1.5 μm, it is possible to reducethe short-circuit defect rate and the withstand voltage defect rate dueto sheet attack in the production process. If the thickness T1 of thefirst ceramic layer becomes 1.5 μm or more, the short-circuit defectrate will be lowered, but there is a tendency for the withstand voltagedefect rate to become higher. The thickness T1 is the thickness of theceramic coating layer before firing. When firing the ceramic body, thethickness of the ceramic coating layer is reduced. Therefore, even afterfiring, the above thickness condition is always satisfied.

[0045] In the method of production according to the present invention, afirst ceramic coating layer is formed on the surface of a substrate, aninternal electrode is printed on the surface of the first ceramiccoating layer, then a second ceramic coating layer is formed on thesurface of the substrate so as to cover the internal electrode. Next, aninternal electrode is printed on the second ceramic coating layer, thena third ceramic coating layer is formed on the surface of the secondceramic coating layer so as to cover the internal electrode and therebyform a stack. Next, the stack is peeled off from the substrate.Therefore, it is possible to handle these layers as adifficult-to-damage stack and avoid delamination, pinholes, withstandvoltage defects, and other structural defects due to damage.

[0046] Further, since the first ceramic coating layer is formed on thesurface of the substrate and then an internal electrode is formed byprinting etc. on the surface of the first ceramic coating layer, whenpeeling the stack off from the substrate, the peeled surface of thefirst ceramic coating layer becomes a smooth flat surface. Therefore, byusing this smooth surface as the stacking surface, it is possible toavoid delamination, pinholes, withstand voltage defects, and otherstructural defects due to step differences.

[0047] Further, since the first ceramic coating layer is formed on thesurface of the substrate, then the internal electrode is printed on thesurface of the first ceramic coating layer, it is possible to coat apeeling agent on the substrate to facilitate the peeling of the firstceramic coating layer. Further, it is possible to reliably peel off evena very thin first ceramic coating layer of several micrometers from thesubstrate without causing damage. Therefore, it is possible to avoid toa great extent delamination, pinholes, withstand voltage defects, andother structural defects due to damage of the first ceramic coatinglayer at the time of peeling.

[0048] Further, since the internal electrode is formed on the firstceramic coating layer, unlike the case of printing an internal electrodeon the surface of a peeling agent, the shape of the internal electrodewill not end up being ruined due to the surface tension.

[0049] A plurality of peeled off stacks are successively stacked so thata first ceramic coating layer contained in one stack among two adjoiningstacks contacts a third ceramic coating layer contained in the otherstack. Therefore, a dense, high packing density first ceramic layer isinterposed between internal electrodes between the stacked groups, so itis possible to reduce the short-circuit defect rate and the withstandvoltage defect rate.

[0050] Preferably, the ceramic coating is coated using an extrusion typecoating head. The amount of the ceramic coating fed is preferablycontrolled by a, mass flowmeter and a fixed displacement pump. Themethod of production according to the present invention is particularlysuited to a multilayer ceramic capacitor.

[0051] Preferably, α1<α2 and α1<α3. By setting these ranges, the effectsof the present invention are enhanced.

[0052] Preferably T1+T3≦6 μm, more preferably T1+T3≦4 μm. Further,preferably T2≦6 μm, more preferably T2≦4 μm. By setting such ranges, itis possible to reduce the thickness between layers of internalelectrodes while maintaining the effects of the present invention andcontribute to an improvement in the electrostatic capacity.

[0053] Further, preferably T1+T3 is substantially equal to T2. Bysetting this, it is possible to make the thicknesses between layers ofinternal electrodes uniform.

[0054] According to the method of production of a ceramic electronicdevice of the second aspect of the present invention, it is possible toefficiently produce a ceramic electronic device according to the secondaspect of the present invention.

[0055] A ceramic electronic device according to the second aspect of thepresent invention has a ceramic body comprised of ceramic layers stackedtogether and a plurality of internal electrodes stacked inside theceramic body via the ceramic layers, wherein at least one of the ceramiclayers present between pairs of adjoining internal electrodes is amultilayer structure of a first ceramic layer and a third ceramic layer,each of the remaining ceramic layers in the ceramic layers presentbetween pairs of adjoining internal electrodes is configured by a secondceramic layer alone, and, when a mean particle size of ceramic particlesof the first ceramic layer is α1, a thickness of the first ceramic layeris T1, a mean particle size of ceramic particles of the second ceramiclayer is α2, a thickness of the second ceramic layer is T2, a meanparticle size of ceramic particles of the third ceramic layer is α3, anda thickness of the third ceramic layer is T3, the conditions of α1≦α2,α1≦α3, 0.05 μm<α1≦0.35 μm, T1<T2, T1<T3, and 0 μm<T1<1.5 μm aresatisfied.

[0056] Preferably, there is at least one ceramic layer configured by asecond ceramic layer alone between pairs of adjoining ceramic layers ofmultilayer structures comprised of the first ceramic layer and thirdceramic layer. In this case, it is possible to increase the totalthickness in each stacked unit (stacked group) and reduce the times ofstacking the stacked units,

BRIEF DESCRIPTION OF THE DRAWINGS

[0057] These and other objects and features of the present inventionwill become clearer from the following description of the preferredembodiments given with reference to the attached drawings, wherein:

[0058]FIG. 1 is a cross-sectional view of a multilayer ceramic capacitoras a ceramic electronic device according to an embodiment of the presentinvention;

[0059]FIG. 2 is an enlarged cross-sectional view schematically showingthe internal structure of the multilayer ceramic capacitor shown in FIG.1;

[0060]FIG. 3 is a schematic cross-sectional view of a method ofproduction of a multilayer ceramic capacitor according to an embodimentof the present invention;

[0061]FIG. 4 is a schematic plane view of a first ceramic coating layerobtained by the step shown FIG. 3;

[0062]FIG. 5 is a cross-sectional view schematically showing, thestructure of the first ceramic coating layer shown in FIG. 4;

[0063]FIG. 6 is a plan view of a step after the step shown in FIG. 3;

[0064]FIG. 7 is a cross-sectional view schematically showing thestructure of the first ceramic coating layer and internal electrodesobtained by the step shown in FIG. 6;

[0065]FIG. 8 is a schematic cross-sectional view of a step after thestep shown in FIG. 6;

[0066]FIG. 9 is a schematic plane view of a second ceramic coating layerobtained by the step shown in FIG. 8;

[0067]FIG. 10 is a plan view of a step after the step shown in FIG. 8;

[0068]FIG. 11 is a schematic view of a second ceramic coating layerobtained by the step shown in FIG. 10;

[0069]FIG. 12 is a schematic view of a step after the step shown in FIG.11;

[0070]FIG. 13 is a schematic view of a step after the step shown in FIG.12;

[0071]FIG. 14 is a schematic view of a step after the step shown in FIG.13;

[0072]FIG. 15 is an enlarged cross-sectional view schematically showingthe internal structure of a multilayer ceramic capacitor according toanother embodiment of the present invention;

[0073]FIG. 16 is an enlarged cross-sectional view of a modification ofFIG. 15;

[0074]FIG. 17 is a schematic cross-sectional view of a process ofproduction of a multilayer ceramic capacitor shown in FIG. 15;

[0075]FIG. 18 is a schematic cross-sectional view showing a step afterFIG. 17;

[0076]FIG. 19 is a schematic cross-sectional view showing a step afterFIG. 197 and

[0077]FIG. 20 is a schematic cross-sectional view showing a step afterFIG. 19.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0078] First Embodiment

[0079] First, a ceramic electronic device of the present invention willbe explained. As a ceramic electronic device of the present invention, apiezoelectric device, PTC thermistor, NTC thermistor, varistor, etc. maybe mentioned. The ceramic electronic device of the present invention isnot however limited to these. The invention may be applied to allceramic electronic devices where a plurality of internal electrodes arestacked inside a ceramic body through ceramic layers. In the followingexplanation, the case of application of the present invention to amultilayer ceramic capacitor will be explained.

[0080] As shown in FIG. 1, a multilayer ceramic capacitor includes aceramic body 1 made of a plurality of ceramic dielectric layers (alsocalled “ceramic layers”) and internal electrodes 21 and 22 inside theceramic body 1. Internal electrodes 21 and 22 are embedded inside theceramic body 1 at intervals from each other. FIG. 1 shows a multilayerceramic capacitor, so the adjoining internal electrodes 21 and 22 areconnected at alternating ends to terminal electrodes 31 and 32 providedat the two facing ends of the ceramic body 1 to form a multilayercapacitor circuit.

[0081]FIG. 2 is an enlarged cross-sectional view schematically showingthe internal structure of the multilayer ceramic capacitor shown inFIG. 1. For convenience in illustration, the middle part is omitted.Each of the internal electrodes 21 and 22 contacts a first ceramic layer110 at one surface and a second ceramic layer 120 at the other surface.In this embodiment, the first ceramic layer 110 and the second ceramiclayer 120 are formed by ceramic dielectrics.

[0082] As shown in FIG. 2, the ceramic mean particle size α1 of thefirst ceramic layer 110, its thickness T1, the ceramic mean particlesize α2 of the second ceramic layer, and its thickness T2 satisfy therelations α1≦α2, 0.05 μm<α1≦0.35 μm, T1<T2, and 0 μm<T1<1.5 Mm.

[0083] Further, a plurality of groups of the first ceramic layer 110, aninternal electrode 21 or 22, and the second ceramic layer 120 aresuccessively stacked with the first ceramic layers 110 and the secondceramic layers 120 in contact. The number of these stacked is selectedin accordance with the outer dimensions which have to be satisfied andthe required capacitance etc. For example, to obtain a capacitance of100 μF, as many as several hundreds of these are stacked. The ceramiclayers are stacked in a number according to the number of the internalelectrodes and can give a multilayer ceramic capacitor able to give acorresponding capacitance.

[0084] Further, since the ceramic mean particle size α1 of the firstceramic layers 110 and the ceramic mean particle size α2 of the secondceramic layers 120 satisfy α1≦α2, it is possible to form dense, highpacking density first ceramic layers 110. Therefore, it is possible toavoid to a great extent pinholes, withstand voltage defects, and otherstructural defects.

[0085] Further, since the ceramic mean particle size α1 of the firstceramic layers 110 satisfies 0.05 μm<α1≦0.35 μm it is possible to reducethe short-circuit defect rate and the withstand voltage defect rate.

[0086] Further, since the thickness T1 of the first ceramic layers 110and the thickness T2 of the second ceramic layers 120 satisfy T1<T2, itis possible to avoid to a great extent an increase in thickness due tothe thickness T1 of the first ceramic layers 110, avoid to a greatextent an increase in thickness of the capacity layers in for example amultilayer ceramic capacitor, and secure the acquired capacitance andother electrical characteristics. Specifically, it is possible torealize a 100 μF multilayer ceramic capacitor of a horizontal×verticalsize of 3.2×1.6 (mm).

[0087] Since the thickness T1 of the first ceramic layers 110 satisfies0 μm<T1<1.5 μm, no short-circuit defects and withstand voltage defectsare incurred. If the thickness T1 of the first ceramic layers 110becomes more than 1.5 μm, while the short-circuit defect rate will belowered, there is a tendency for the withstand voltage defect rate tobecome higher. Note that the thickness T1 is the thickness of theceramic coating layers before firing. When firing the device, thepre-firing ceramic coating layers which will form the ceramic layersshrink, so the above thickness condition will always be satisfied.

[0088] Next, the method of production of a ceramic electronic deviceaccording to an embodiment of the present invention will be explainedwith reference to FIG. 3 to FIG. 14.

[0089] First, as shown in FIG. 3 to FIG. 5, a coating apparatus 5 isused to coat a ceramic coating on the surface of a substrate 6 tothereby form a first ceramic coating layer 110 having a thickness T1(see FIG. 5).

[0090] The first ceramic coating layer 110 is formed so that itsthickness T1 satisfies 0<T1≦1.5 μm. If the thickness T1 of the firstceramic coating layer 110 becomes more than 1.5 Mm, the short-circuitdefect rate will be reduced, but there will be a tendency for thewithstand voltage defect rate to become higher.

[0091] For the substrate 6, a flexible organic resin film, specificallya polyethylene terephthalate film (PET film) is used.

[0092] The substrate 6 is preferably treated in advance on the surfacewhere the ceramic coating layer will be formed to facilitate peeling ofthe first ceramic coating layer 110. The treatment may be performed bylightly coating one surface of the substrate 6 with a peeling film of Sietc. By applying this peeling treatment, it is possible to easily peelthe first ceramic coating layer 110 formed on the substrate 6 from thesubstrate 6.

[0093] For the ceramic coating, it is possible to use one comprised ofan acrylic resin or butyral resin or other organic binder, organicsolvent, plasticizer, and ceramic powder mixed together to form acoating.

[0094] The mean particle size α1 of the ceramic particles included inthe ceramic coating for forming the first ceramic coating layer 110 isin a range of 0.05 μm<α1≦0.35 μm. If the mean particle size α1 becomessmaller than 0.05 μm, there will be a tendency for the dispersibility ofthe ceramic particles at the time of preparing the ceramic coating todeteriorate and for formation of a uniform ceramic coating layer tobecome impossible.

[0095] The mean particle size α1 of the ceramic particles forming thefirst ceramic layer 110 further satisfies α1≦0.35 μm. If in this range,short-circuit defects and withstand voltage defects can be reduced. Ifthe mean particle size α1 of the ceramic particles exceeds 0.35 μm,there will be a tendency for short-circuit defects and withstand voltagedefects to occur easily. This means that there is a critical point atwhich the effects of sheet attack can be reduced near the mean particlesize α1 of the ceramic particles of 0.35 μm. The mean particle sizes α1and α2 can be considered substantially the same before and after firing.

[0096] In coating and forming the first ceramic coating layer 110, it ispossible to use as the coating apparatus 5 an extrusion type coatinghead, the doctor blade method, the reverse roll method, etc. Amongthese, an extrusion type coating head is particularly preferable.

[0097] The illustrated embodiment shows an example of the pastingapparatus 5 using an extrusion type coating head. If using a coatingapparatus 5 provided with an extrusion type coating head, it is possibleto obtain a uniform first ceramic coating layer 110 having an extremelygood surface precision and little unevenness of thickness.

[0098] The extrusion type coating head 5 shown in FIG. 3 is providedwith a ceramic coating discharge slit 51, an upstream side nozzle 52, adownstream side nozzle 53, a ceramic coating reservoir 54, a feed port55 to the ceramic coating reservoir 54, etc. Such an extrusion typecoating head is known. In FIG. 3, reference F1 shows the travelingdirection of the substrate 6.

[0099] When obtaining a piezoelectric device, PTC thermistor, NTCthermistor, varistor, or other ceramic electronic device, as the ceramicpowder, one of a piezoelectric ceramic material, positive temperaturecoefficient ceramic material, negative temperature coefficient ceramicmaterial, or piezoelectric nonlinear ceramic material is used.

[0100] Next, after a drying step for drying the first ceramic coatinglayer 110 and other necessary steps, as shown in FIG. 6 and FIG. 7,internal electrodes 21 and 22 are printed on the surface of the firstceramic coating layer 110. As the internal electrode paste for theinternal electrodes 21 and 22, a conventionally known one may be used.Specifically, an organic binder dissolved in an organic solvent is usedas a vehicle, Ag, Pd, Ni, Cu, or another conductive metal powder isdispersed in the vehicle, and in some cases a diluent for adjusting theviscosity is added to prepare the paste. As the organic solvent in thevehicle, terpineol, methyl ethyl ketone, etc. is used. As the binder,ethyl cellulose, nitrocellulose, or another cellulose-based resin orbutyl methacrylate, methyl methacrylate, or another acrylic-based resinis used. Further, as the diluent, an aromatic hydrocarbon, a fatty acidhydrocarbon, etc. is used.

[0101] In the case of the present invention, even if the internalelectrode paste of the above composition is coated on the first ceramiccoating layer 110 to form the internal electrodes 21 and 22, the firstceramic coating layer 110 is resistant to sheet attack by the organicsolvent contained in the internal electrode paste. This is believed tobe because the sheet attack is blocked since the mean particle size α1of the ceramic particles contained in the ceramic coating for formingthe first ceramic coating layer 110 was made one of a range of 0.05μm<α1≦0.35 μm.

[0102] Therefore, according to the present invention, it does not becomedifficult to peel the first ceramic coating layer 110 from the substrateand no holes or wrinkles occur in the first ceramic coating layer 110.Therefore, it is possible to avoid short-circuit defects and withstandvoltage defects and secure a predetermined electrostatic capacitance,

[0103] The internal electrodes 21 and 22 are formed as a group ofpatterns. The internal electrodes 21 and 22 can be formed in patterns ofthousands of electrodes regularly arranged in for example 30 cm×30 cmregions GR1 to GR3 (see FIG. 6). As the printing means, the ordinaryscreen printing can be applied. Further, gravure printing etc. may alsobe applied.

[0104] As explained above, since the internal electrodes 21 and 22 areformed on the first ceramic coating layer 110, unlike the case ofprinting internal electrodes 21 and 22 on the surface of a peelingagent, the shapes of the internal electrodes 21 and 22 will not end upbeing ruined due to the surface tension.

[0105] Next, after the step of drying the internal electrodes etc., asshown in FIG. 8 to FIG. 11, a second ceramic coating layer 120 is formedon the surface of the first ceramic coating layer 110 so as to cover theinternal electrodes 21 and 22. The second ceramic coating layer 120 canalso be formed using a coating apparatus 5 using an extrusion typecoating head.

[0106] The ceramic coating for forming the second ceramic coating layer120 may be the same in composition as the ceramic coating for formingthe first ceramic coating layer 110, but the mean particle size α2 ofthe ceramic particles included in the ceramic coating is selected tosatisfy α1≦α2 with respect to the mean particle size α1 of the ceramicparticles included in the ceramic coating for forming the first ceramiccoating layer 110.

[0107] By satisfying α1 ≦α2, it is possible to form a dense, highpacking density first ceramic coating layer 110 and possible to reducethe required thickness by the second ceramic coating layer 120.Therefore, it is possible to avoid to a great extent pinholes, withstandvoltage defects, and other structural defects.

[0108] As explained above, the mean particle size α1 of the firstceramic coating layer 110 is selected to be not more than 0.05 μm. Ifviewed from the standpoint of blocking sheet attack and improving thewithstand voltage, a smaller mean particle size α1 is better, but if themean particle size α1 becomes smaller than 0.05 μm, there is a tendencyfor the dispersibility at the time of preparing the ceramic coating todeteriorate and for formation of a uniform ceramic coating layer tobecome impossible.

[0109] The second ceramic coating layer 120 is formed so that itsthickness T1 satisfies T1<T2 with respect to the thickness T1 of thefirst ceramic coating layer 110. By satisfying this relationship, it ispossible to restrict the thickness T1 of the first ceramic coating layer110, avoid to a great extent an increase in thickness due to thethickness T1 of the first ceramic coating layer 110, avoid to a greatextent an increase in thickness of the capacity layer in for example amultilayer ceramic capacitor, and secure the acquired capacity and otherelectrical characteristics.

[0110] When producing a small sized and large capacitance multilayerceramic capacitor, the total (T1+T2) of the thicknesses T1 and T2 shouldbe as small as possible in the range able to secure the requiredwithstand voltage. As one example, when obtaining a 100 μF multilayerceramic capacitor having a planar shape of 3.2×1.6 mm, the total (T1+T2)of the thicknesses T1 and T2 is preferably not more than 6 μm, morepreferably not more than 4 μm. By making the thickness between layers ofinternal electrodes smaller, it is possible to increase theelectrostatic capacitance and contribute to a reduction of the overallsize.

[0111] Assuming that the thickness T2 of the second ceramic coatinglayer 120 satisfies T1<T2 and the thickness T1 becomes smaller than 1.5μm, the total (T1+T2) of the thicknesses is selected to be kept to notmore than 6 μm or within 4 μm. Note that as shown in FIG. 11, by coatingthe second ceramic coating layer 120, the second ceramic coating layer120 is also packed between the internal electrodes 21 and 22, 80 thesmoothness of the surface of the second ceramic coating layer 120 issecured. This contributes to the elimination of the step differences atthe time of stacking. The surface of the second ceramic coating layer120 is the portion contacting the surface of the first ceramic coatinglayer 110. Securing the smoothness of the surface of that portioncontributes to the elimination of step differences in the stack andenables a greater number of layers to be stacked. The same is true inthe later explained second embodiment as well. However, in the laterexplained second embodiment, the portion contacting the surface of thefirst ceramic coating layer 110 is the surface of the third ceramiccoating layer 130 (see FIG. 15 or FIG. 16).

[0112] Next, after the drying step and other necessary steps, thecombined stack of the first ceramic coating layer 110, internalelectrodes 21 and/or 22, and second ceramic coating layer 120 is peeledoff as a unit from the substrate 6. Due to this, as shown in FIG. 12, itis possible to obtain a unit of a combined stack of the first ceramiccoating layer 110, internal electrodes 21 and/or 22, and second ceramiccoating layer 120.

[0113] In the present embodiment, since it is possible to peel off thecombined stack of the first ceramic coating layer 110, internalelectrodes 21 and/or 22, and second ceramic coating layer 120 as a unit,it is possible to handle these layers as a difficult-to-damage stack andavoid to a great extent delamination, pinholes, withstand voltagedefects, and other structural defects due to damage.

[0114] Further, in the present embodiment, since the first ceramiccoating layer 110 is formed on the surface of the substrate and theninternal electrodes 21 and 22 are printed on the surface of the firstceramic coating layer 110, when peeling the first ceramic coating layer110 off from the substrate, the peeled surface of the first ceramiccoating layer 110 becomes a smooth flat surface.

[0115] Next, the regions GR1 to GR3 of FIG. 6 are punched out. Exactlythe necessary number of the punched out stacks are successively stackedon a table 7 as units of the first ceramic coating layer 110, internalelectrodes 21 and/or 22, and second ceramic coating layer 120 as shownin FIG. 13. In stacking these units, they are successively stacked sothat the first ceramic coating layer 110 and second ceramic coatinglayer 120 contact each other between adjoining stacks.

[0116] The thus obtained stack, as shown in FIG. 14, is then heat andpressure bonded by a press 8.

[0117] Here, since the ceramic mean particle size α1 of the firstceramic layer 110 and the ceramic mean particle size α2 of the secondceramic layer 120 satisfy α1≦α2, it is possible to form a dense, highpacking density first ceramic layer 110. Therefore, it is possible toavoid to a great extent pinholes, withstand voltage defects, and otherstructural defects.

[0118] Further, the peeled surface of the first ceramic coating layer110 is a smooth and flat surface. Therefore, by using this smooth peeledsurface as the stacking surface, it is possible to avoid delamination,pinholes, withstand voltage defects, and other structural defects due tostep differences.

[0119] Next, the stack is cut to obtain multilayer green chips. Theobtained multilayer green chips are treated under predeterminedtemperature conditions to remove the binder, then fired and furtherprovided with terminal electrodes by baking to form the desired ceramicelectronic devices,

[0120] The conditions for removal of the binder and firing are known inthe art. For example, the chips are kept at 280° C. for 12 hours toremove the binder and are fired in a reducing atmosphere at 1300° C. for2 hours. Terminal electrodes 31 and 32 are formed on the stacks obtainedafter firing. The material and method of formation of the terminalelectrodes 31 and 32 are well known in the art. For example, copper isused as the main ingredient and baked on in N₂+H₂ at 800° C. for 30minutes to form a plating. Next, the effects of the ceramic electronicdevice according to the present invention will be explained withreference to experimental data.

[0121] Using the method of production according to the presentinvention, multilayer ceramic capacitors of vertical×horizontaldimensions of 3.2×2.5 (mm) and 100 layers were produced. In theproduction process, the total (T1+T2) of the thicknesses of the firstand second ceramic coating layers 110 and 120 was made a target value of4 μm. In that range, the thickness T1 of the first ceramic coating layer110 and the thickness T2 of the second ceramic coating layer 120 werechanged. Further, the mean particle sizes α1 and α2 of the ceramiccoatings were changed in the range of the present invention to therebyprepare samples of different multilayer ceramic capacitors. These aredesignated as Examples 1 to 4.

[0122] On the other hand, the thickness T1 of the first ceramic coatinglayer 110 and the thickness T2 of the second ceramic coating layer 120and further the mean particle sizes α1 and α2 of the ceramic coatingswere changed to be outside the ranges of the present invention so as toprepare samples of different multilayer ceramic capacitors. The obtainedsamples of multilayer ceramic capacitors are designated as ComparativeExamples 1 to 3. Further, a sample of a multilayer ceramic capacitorhaving only the first ceramic coating layers and not having the secondceramic coating layers was prepared, This sample was obtained bysuccessively stacking units obtained by coating a ceramic coating layeron the substrate and forming internal electrodes on top and is anexample of application of the general method of production of therelated art. This sample is designated as Comparative Example 4.

[0123] The above Examples 1 to 4 and Comparative Examples 1 to 4 weremeasured as to their short-circuit defect rates and withstand voltagedefect rates. The withstand voltage defect rate was found by applying a50V DC voltage, judging the insulation resistance under 1×10⁴ Ω as beingdefective, and finding the percentage of the number of defects. Further,the short-circuit defect rate was found by applying a 2 V DC voltage,judging the insulation resistance under 1×10 a as being defective, andfinding the percentage of the number of defects. The number of samples Nprovided for the tests was made 100 for each of the examples andcomparative examples.

[0124] The results of measurement of the short-circuit defect rate andwithstand voltage defect rate for Examples 1 to 4 and ComparativeExamples 1 to 4 are shown together with the thicknesses T1 and T2 andmean particle sizes α1 and α2 of the ceramic coating layers in Table 1.TABLE 1 Short- Withstand First Second circuit voltage ceramic layerceramic layer defect defect α1 (μm) T1 (μm) α2 (μm) T2 (μm) rate (%)rate (%) Ex. 1 0.35 1.0 0.35 3.0 6 5 Ex. 2 0.20 1.0 0.35 3.0 3 4 Ex. 30.20 0.6 0.35 3.4 2 3 EX. 4 0.20 1.0 0.20 3.0 1 1 Comp. Ex. 0.35 *1.50.35 2.5 11 9 1 Comp. Ex. 0.35 *2.0 0.35 *2.0 15 10 2 Comp. Ex. *0.501.0 0.50 3.0 41 2.7 3 Comp. Ex. 0.35 *4.0 — — 35 21 4

[0125] As shown in Table 1, in Comparative Example 4 of the related artobtained by successively stacking units obtained by coating a ceramiccoating layer on a substrate and forming internal electrodes on top, theshort-circuit defect rate reached as high as 35% and the withstandvoltage defect rate also was a high 21%.

[0126] In Comparative Examples 1 to 3 having the first ceramic coatinglayers and second ceramic coating layers, but having thicknesses T1 andT2 and mean particle sizes α1 and α2 of the ceramic particles notsatisfying one of α1 ≦α2, 0.05 μm<α1≦0.35 μm and T1<T2, 0 μm<T1<1.5 μmthe short-circuit defect rates were in the range of 11% to 41% and thewithstand voltage defect rates were high values of 9% to 17% as well.

[0127] As opposed to this, Examples 1 to 4 according to the presentinvention, satisfying the above relations, were kept in ranges ofshort-circuit defect rates of 1% to 6% and ranges of withstand voltagedefect rates of 1% to 5%. This shows remarkable superiority overComparative Examples 1 to 4.

[0128] As explained above, according to the present invention, thefollowing effects can be obtained:

[0129] (a) It is possible to provide a ceramic electronic device, inparticular a multilayer ceramic capacitor, resistant to short-circuitdefects, withstand voltage defects, and other structural defects.

[0130] (b) It is possible to provide a method of production of a highprecision, high reliability ceramic electronic device able to remarkablyreduce the difficulty in peeling and probability of occurrence ofdefects in characteristics of the product even if reducing the thicknessof the ceramic coating layers.

[0131] (c) It is possible to provide a method of production of a ceramicelectronic device remarkably reducing the step differences betweenlayers due to the electrodes and improving the reliability.

[0132] Second Embodiment

[0133] Next, a multilayer ceramic capacitor according to anotherembodiment of the present invention will be explained.

[0134]FIG. 15 is an enlarged cross-sectional view schematically showingthe internal structure of a multilayer ceramic capacitor according to asecond embodiment of the present invention. For convenience inillustration, the middle part is not shown. The overall cross-section ofthe multilayer ceramic capacitor according to the present embodiment isthe same as that shown in FIG. 1 and includes the ceramic body 1,internal electrodes 21 and 22, and terminal electrodes 31 and 32. In thepresent embodiment, however, as shown in FIG. 15, the ceramic body 1includes first ceramic layers 110, second ceramic layers 120, and thirdceramic layers 130. Note that at least one ceramic layer present betweenpairs of adjoining internal electrodes 21 and 22 is a multilayerstructure. From this viewpoint, the third ceramic layer 130 in thepresent embodiment corresponds to the second ceramic layer 120 in thefirst embodiment.

[0135] A first ceramic layer 110 contacts one surface of an internalelectrode 21. A second ceramic layer 120 contacts another internalelectrodes 22 not adjoining a first ceramic layer 110.

[0136] A third ceramic layer 130 adjoins the other surface of theinternal electrode 22 which the second ceramic layer 120 contacts.

[0137] The first to third ceramic layers 110 to 130 and the internalelectrodes 21 and 22 form stacked groups (stacked units) C1, C2, . . .Cn each having the first ceramic layer 110 as a bottommost layer and thethird ceramic layer 130 as a topmost layer.

[0138] There are a plurality (n) of stacked groups. The “n” of thestacked groups C1 to Cn may be any number. Each of the stacked groups C1to Cn is comprised of a first ceramic layer 110 and a third ceramiclayer 130 stacked adjoining each other via internal electrodes 21 or 22,

[0139] The first ceramic layer 110 and the second and third ceramiclayers 120 and 130 are of the same material, but differ in the ceramicmean particle size and thickness. That is, the ceramic mean particlesize α1 of the first ceramic layer 110, its thickness T1, the ceramicmean particle size α2 of the second ceramic layer 120, its thickness T2,the ceramic mean particle size α3 of the third ceramic layer 130, andits thickness T3 satisfy the relations:

[0140] α1≦α2 or α3,

[0141] 0.05<α1≦0.35 μm,

[0142] T<T2 or T3,and

[0143] 0<T1<0.5 μm.

[0144] The ceramic body 1 includes first ceramic layers 110, secondceramic layers 120, and third ceramic layers 130. The first ceramiclayer 110 contacts one surface of the internal electrode 21. The secondceramic layer 120 contacts; the other surface of the internal electrode21 contacted by the first ceramic layer 110 and further contacts onesurface of another internal electrode 22 not contacted by the firstceramic layer 110. The third ceramic layer 130 contacts the othersurface of the internal electrode 22 contacted by the second ceramiclayer 120.

[0145] The first to third ceramic layers 110 to 130 and the internalelectrodes 21 and 22 form stacked groups C1, C2, . . . Cn each havingthe first ceramic layer 110 as a bottommost layer and the third ceramiclayer 130 as a topmost layer.

[0146] Further, each of the stacked groups C1 to Cn is stacked with thefirst ceramic layer 110 and third ceramic layer 130 in contact. Due tothis structure, dense, high packing density first ceramic layers 110 areinterposed between the stacked groups C1 to Cn, and it is possible toreduce the short-circuit defect rate and withstand voltage defect rate.

[0147] The ceramic mean particle sizes α1 to α3 of the first to thirdceramic layers 110 to 130 satisfy α1≦α2 and α1≦α3. Due to thisconfiguration, is possible to effectively avoid pinholes, withstandvoltage defects, and other structural defects.

[0148] Further, the ceramic mean particle size α1 of the first ceramiclayer 110 satisfies 0.05<α1≦0.35 μm. By satisfying this condition, it ispossible to reduce sheet attack in the production process and reduce theshort-circuit defect rate and withstand voltage defect rate.

[0149] Further, the thicknesses T1 to T3 of the-first to third ceramiclayers 110 to 130 satisfy T1<T2 and T1<T3. According to this, it ispossible to avoid to a great extent an increase in thickness of theceramic layers due to the thickness T1 of the first ceramic layers 110and to secure the acquired capacity and other electrical characteristicsin the multilayer ceramic capacitor.

[0150] The thickness T1 of the first ceramic layers 110 satisfies0<T1<1.5 μm. If in this range, it is possible to reduce theshort-circuit defect rate and the withstand voltage defect rate due tosheet attack in the production process. No short-circuit defects andwithstand voltage defects are incurred either. If the thickness T1 ofthe first ceramic layers 110 becomes 1.5 μm or more, the short-circuitdefect rate will be lowered, but there is a tendency for the withstandvoltage defect rate to become higher. The thickness T1 is the thicknessof the ceramic coating layers before firing. When firing the ceramicbody, the thickness of the ceramic coating layers is reduced. Therefore,even after firing, the above thickness condition is always satisfied.

[0151]FIG. 16 is an enlarged cross-sectional view schematically showingthe internal structure of another example of the multilayer ceramiccapacitor shown in FIG. 1. In the figure, components the same ascomponents appearing in FIG. 1 and FIG. 15 are assigned the samereference numerals. This embodiment is characterized by being comprisedof a plurality of groups of the second ceramic layer 120 and internalelectrodes 21 or 22. In the illustrated embodiment, there are two groupsof the second ceramic layer 120 and internal electrodes 22 and 21, butthe number can be further increased. In the embodiment shown in FIG. 16as well, the same actions and effects as the embodiment shown in FIG. 15are obtained.

[0152] Next, the method of production of the multilayer ceramiccapacitor according to the embodiment shown in FIG. 15 will beexplained,

[0153] First, as shown in FIG. 3 to FIG. 5, a coating apparatus 5 isused to coat a ceramic coating on the surface of a substrate 6 to form afirst ceramic coating layer 110 having a thickness T1 (see FIG. 5). Thesteps shown in FIG. 3 to FIG. 5 are the same as those of the firstembodiment, 80 explanations will be omitted.

[0154] Next, after a drying step for drying the first ceramic coatinglayer 110 and other necessary steps, as shown in FIG. 6 and FIG. 7,internal electrodes 21 and 22 are printed on the surface of the firstceramic coating layer 110. The steps shown in FIG. 6 and FIG. 7 are alsosimilar to those in the first embodiment, so explanations will beomitted.

[0155] Next, after a step for drying the internal electrodes etc., asshown in FIG. 8 to FIG. 11, a second ceramic coating layer 120 is formedon the surface of the first ceramic coating layer 110 so as to cover theinternal electrodes 21 and 22. The steps shown in FIG. 8 to FIG. 11 arealso similar to those in the first embodiment, so explanations will beomitted.

[0156] Next, after a drying step for drying the second ceramic coatinglayer 120 and other necessary steps, as shown in FIG. 17, internalelectrodes 21 and 22 are printed on the surface of the second ceramiccoating layer 120. The internal electrode paste for the internalelectrodes 21 and 22 is similar to that explained above. FIG. 17 is anenlarged cross-sectional view cut above the internal electrode 21 amongthe two internal electrodes 21 and 22 formed on the first ceramiccoating layer 110.

[0157] Next, after a step for drying the internal electrodes etc., asshown In FIG. 18, a third ceramic coating layer 130 is formed on thesurface of the second ceramic coating layer 120 so as to cover theinternal electrodes 21 and/or 22. The ceramic coating for forming thethird ceramic coating layer 130 may be the same as or different from theceramic coatings for forming the first and second ceramic coating layers110 and 120.

[0158] As shown in FIG. 16, when using a plurality of groups of thesecond ceramic layers and internal electrodes, the plurality of groupsof the second ceramic coating layers 120 and internal electrodes 22 (or21) are formed before forming the third ceramic coating layer 130. Inpractice, it is preferable to form two or three second ceramic coatinglayers 120 from the viewpoint of eliminating step differences

[0159] The mean particle size α3 of the ceramic particles included inthe ceramic coating forming the third ceramic coating layer 130 isselected to satisfy α1≦α3 with respect to the mean particle size α1 ofthe ceramic particles including in the ceramic coating for forming thefirst ceramic coating layer 110. The mean particle size α3 may be sameas or different from the mean particle size α2 of the ceramic coatingincluded in the second ceramic coating layer 120.

[0160] The third ceramic coating layer 130 is formed to a thickness T3satisfying T1<T3 with respect to the thickness T1 of the first ceramiccoating layer 110. The thickness T3 may be the same as or different fromthe thickness T2 of the second ceramic coating layer 120.

[0161] In the relationship of the third ceramic coating layer 130 to thefirst ceramic coating layer 110, the condition to be satisfied by themean particle size α3 with respect to the mean particle size α1 and thecondition to be met by the thickness T3 with respect to the thickness T1are set for similar purposes as the conditions to be satisfied by themean particle size α2 and thickness T2 of the second ceramic coatinglayer 120.

[0162] As explained above, the first ceramic coating layer 110 and thirdceramic coating layer 130 are stacked in contact resulting in a singledielectric layer (ceramic layer) formed between the internal electrodes21 and 22. Further, the second ceramic coating layer 120 becomes byitself a single dielectric layer (ceramic layer) formed between theinternal electrodes 21 and 22.

[0163] When producing a small sized and large capacity multilayerceramic capacity, the total (T1+T3) of the thicknesses T1 and T3 and thethickness T2 should be as small as possible in the ranges able to securethe required withstand voltage. As one example, when obtaining a 100 μFmultilayer ceramic capacitor having a planar shape of 3.2 ×1.6 mm, thetotal (T1+T3) of the thicknesses T1 and T2 is preferably not more than 6μm, more preferably not more than 4 μm. Further, the thickness T2 isalso preferably set to not more than 6 μm, more preferably not more than4 μm. By making the thickness between layers of internal electrodessmaller, it is possible to increase the electrostatic capacity andcontribute to a reduction of the overall size. Further, (T1+T3)preferably is substantially equal to T2.

[0164] Assuming that the thickness T3 of the third ceramic coating layer130 satisfies T1<T3 and the thickness T1 becomes smaller than 1.5 μm,the total (T1+T3) of the thicknesses is selected to be kept to not morethan 6 μm or within 4 μm.

[0165] Next, after the drying step and other necessary steps, thecombined stack of the first ceramic coating layer 110, internalelectrodes 21, second ceramic coating layer 120, internal electrodes 22,and third ceramic coating layer 130 is peeled off as a unit from thesubstrate 6. FIG. 19 shows the stack after being peeled off. While notillustrated, there are also internal electrodes 22 at the surface forformation of the internal electrodes 21 (see FIG. 6), and there are alsointernal electrodes 21 at the surface for formation of the internalelectrodes 22 (see FIG. 6).

[0166] In the present embodiment, as explained above, the combined stackof the first ceramic coating layer 110, internal electrodes 21, secondceramic coating layer 120, internal electrodes 22, and third ceramiccoating layer 130 is treated as a unit. Further, it is possible to peeloff the combined stack integrally as a unit from the substrate 6 (seeFIG. 18). Therefore, it is possible to handle these layers as adifficult-to-damage stack and avoid to a great extent delamination,pinholes, withstand voltage defects, and other structural defects due todamage.

[0167] Further, since the first ceramic coating layer 110 is formed onthe surface of the substrate and then internal electrodes 21 and 22 areprinted on the surface of the first ceramic coating layer 110, whenpeeling these off from the substrate 6, the peeled surface of the firstceramic coating layer 110 becomes a smooth flat surface.

[0168] Next, the regions GR1 to GR3 of FIG. 6 are punched out. Exactlythe necessary number of the punched out stacks C1 to Cn are successivelystacked on a table 7 as shown in FIG. 20. In stacking these units, theyare successively stacked so that the first ceramic coating layer 110 andthird ceramic coating layer 130 adjoin each other between adjoiningstacks.

[0169] The thus obtained stack, as shown in FIG. 20, is then heat andpressure bonded by a press 8.

[0170] Here, the peeled surface of the first ceramic coating layer 110is a smooth and flat surface. Therefore, by using this smooth peeledsurface as the stacking surface, it is possible to avoid delamination,pinholes, withstand voltage defects, and other structural defects due tostep differences.

[0171] Next, the stack is cut to obtain multilayer green chips. Theobtained multilayer green chips are treated under predeterminedtemperature conditions to remove the binder, then fired and furtherprovided with terminal electrodes by baking.

[0172] The conditions for removal of the binder and firing, theformation of the terminal electrodes, and the formation of the platingfilms are known in the art and are similar to those in the firstembodiment, so explanations are omitted.

[0173] Next, the effects of the ceramic electronic device according tothe present embodiment will be explained with reference to experimentaldata.

[0174] Using the method of production according to the presentembodiment, multilayer ceramic capacitors of vertical×horizontaldimensions of 3.2×2.5 (mm) and 100 layers were produced. In theproduction, the thicknesses T1 to T3 of the first to third ceramiccoating layers 110 to 130 were changed and the mean particle sizes α1 toα3 of the ceramic coatings were changed in the range of the presentinvention to thereby prepare samples of different multilayer ceramiccapacitors. The obtained samples of multilayer ceramic capacitors aredesignated as Examples 21 to 24.

[0175] On the other hand, the thicknesses T1 to T3 of the first to thirdceramic coating layers 110 to 130 and the mean particle sizes α1 to α3of the ceramic coatings were changed to be outside the ranges of thepresent invention so as to prepare samples of different multilayerceramic capacitors. The obtained samples of multilayer ceramiccapacitors are designated as Comparative Examples 21 to 23. Further, asample according to an example of application of the general method ofproduction of the related art of successively stacking units obtained bycoating a ceramic coating layer on the substrate and forming internalelectrodes on top is designated as Comparative Example 24.

[0176] The above Examples 21 to 24 and Comparative Examples 21 to 24were measured as to their short-circuit defect rates and withstandvoltage defect rates. The methods of measurement are the same asexplained for the experiments of the first embodiment, so explanationsare omitted here.

[0177] The results of measurement of the short-circuit defect rate andwithstand voltage defect rate for Examples 21 to 24 and ComparativeExamples 21 to 24 are shown together with the thicknesses T1 to T3 andmean particle sizes α1 to α3 of the ceramic coating layers in Table 2.TABLE 2 With- stand First Second Third Short- volt- ceramic ceramicceramic circuit age layer layer layer defect defect α1 T1 α2 T2 α3 T3rate rate (μm) (μm) (μm) (μm) (μm) (μm) (%) (%) Ex. 21 0.35 1.0 0.35 4.00.35 3.0 6 5 Ex. 22 0.20 1.0 0.35 4.0 0.35 3.0 3 4 Ex. 23 0.20 0.6 0.354.0 0.35 3.4 3 2 EX. 24 0.20 1.0 0.20 4.0 0.20 3.0 1 2 Comp. 0.35 *1.50.35 4.0 0.35 2.5 13 9 Ex. 21 Comp. 0.35 *2.0 0.35 4.0 0.35 *2.0 16 11Ex. 22 Comp. *0.50 1.0 0.50 4.0 0.50 3.0 47 21 Ex. 23 Comp. 0.35 *4.0 —— — — 40 17 Ex. 24

[0178] As shown in Table 2, in Comparative Example 24 of the related artobtained by successively stacking units obtained by coating a ceramiccoating layer on a substrate and forming internal electrodes on top, theshort-circuit defect rate reached as high as 40% and the withstandvoltage defect rate also was a high 17%.

[0179] In Comparative Examples 21 to 23 having the first ceramic coatinglayers and second ceramic coating layers, but having thicknesses T1 andT2 and mean particle sizes α1 and α2 of the ceramic particles notsatisfying one of

[0180] α1≦α2 or α3, 0.5<α1≦0.35 μm and

[0181] T1<T2 or T3, 0<T1≦1.5 μm

[0182] the short-circuit defect rates were in the range of 13% to 47%and the withstand voltage defect rates were high values of 9% to 21% aswell.

[0183] As opposed to this, Examples 21 to 24 according to the presentintention, satisfying the above relations, were kept in ranges ofshort-circuit defect rates of 1% to 6% and ranges of withstand voltagedefect rates of 2% to 5%. This shows remarkable superiority overComparative Examples 21 to 24.

[0184] As explained above, according to this embodiment of the presentinvention, the following effects can be obtained:

[0185] (a) It is possible to provide a ceramic electronic device, inparticular a multilayer ceramic capacitor, resistant to short-circuitdefects, withstand voltage defects, and other structural defects.

[0186] (b) It is possible to provide a method of production of a highprecision, high reliability ceramic electronic device able to remarkablyreduce the difficulty in peeling and probability of occurrence ofdefects in characteristics of the product even if reducing the thicknessof the ceramic coating layers.

[0187] (c) It is possible to provide a method of production of a ceramicelectronic device remarkably reducing the step differences betweenlayers due to the electrodes and improving the reliability.

[0188] While the invention has been described with reference to specificembodiments chosen for purpose of illustration, it should be apparentthat numerous modifications could be made thereto by those skilled inthe art without departing from the basic concept and scope of theinvention.

1. A method of production of a ceramic electronic device comprising thesteps of: forming a first ceramic coating layer on a surface of asubstrate, forming an internal electrode on a surface of said firstceramic coating layer, and forming a second ceramic coating layer on asurface of said first ceramic coating layer so as to cover said internalelectrode, where, when a mean particle size of ceramic particles of saidfirst ceramic coating layer is α1, a thickness of said first ceramiccoating layer is T1, a mean particle size of ceramic particles of saidsecond ceramic coating layer is α2, and a thickness of said secondceramic coating layer is T2, the conditions of α1≦α2, 0.05 μm<α1≦0.35λm, T1<T2, and 0<T1<1.5 μm are satisfied.
 2. The method of production ofa ceramic electronic device as set forth in claim 1, wherein α1<α2. 3.The method of production of a ceramic electronic device as set forth inclaim 1, further comprising a step of peeling a stack of said firstceramic coating layer, said internal electrode, and said second ceramiccoating layer from said substrate.
 4. The method of production of aceramic electronic device as set forth in claim 3, wherein a pluralityof said stacks peeled from said substrate are successively stacked withsaid first ceramic coating layers and said second ceramic coating layersin contact.
 5. The method of production of a ceramic electronic deviceas set forth in claim 1, wherein T1+T2≦6 μm.
 6. A method of productionof a ceramic electronic device comprising the steps of: forming a firstceramic coating layer on a surface of a substrate, forming an internalelectrode on a surface of said first ceramic coating layer, forming asecond ceramic coating layer on a surface of said first ceramic coatinglayer so as to cover said internal electrode, forming other internalelectrode of a different layer on a surface of said second ceramiccoating layer, forming a third ceramic coating layer on the surface ofsaid second ceramic coating layer so as to cover said other internalelectrode to thereby form a stack, and peeling off said stack from saidsubstrate and successively stacking a plurality of peeled off stacks sothat the first ceramic coating layer contained in one stack among twoadjoining stacks contacts the third ceramic coating layer contained inthe other stack, wherein, when a mean particle size of ceramic particlesof said first ceramic coating layer is cal, a thickness of said firstceramic coating layer is T1, a mean particle size of ceramic particlesof said second ceramic coating layer is α2, a thickness of said secondceramic coating layer is T2, a mean particle size of ceramic particlesof said third ceramic coating layer is α3, and a thickness of said thirdceramic coating layer is T3, the conditions of α1≦α2, α1≦α3, 0.05μm<α1≦0.35 μm, T1<T2, T1<T3, and 0μm<T1<1.5 μm are satisfied.
 7. Themethod of production of a ceramic electronic device as set forth inclaim 6, wherein α1<α2 and α1<α3.
 8. The method of production of aceramic electronic device as set forth in claim 6, wherein T1+T3≦6 μm.9. The method of production of a ceramic electronic device as set forthin claim 8, wherein T2≦6 μm.
 10. A method of production of a ceramicelectronic device as set forth in claim 8, wherein T1+T3 issubstantially equal to T2.
 11. The method of production as set forth inclaim 1, wherein a multilayer ceramic capacitor is produced.
 12. Themethod of production as set forth in claim 6, wherein a multilayerceramic capacitor is produced.
 13. A ceramic electronic devicecomprising: a ceramic body comprised of ceramic layers stacked togetherand a plurality of internal electrodes stacked inside said ceramic bodyvia said ceramic layers, wherein at least one of said ceramic layerspresent between pairs of adjoining internal electrodes is a multilayerstructure of a first ceramic layer and a second ceramic layer and, whena mean particle size of ceramic particles of said first ceramic layer isα1, a thickness of said first ceramic layer is T1, a mean particle sizeof ceramic particles of said second ceramic layer is α2, and a thicknessof said second ceramic layer is T2, the conditions of α1≦α2, 0.05μm<α1≦0.35 μm, and T1<T2, 0 μm<T1≦1.5 μm are satisfied.
 14. The ceramicelectronic device as set forth in claim 13, wherein each of said ceramiclayers present between pairs of adjoining internal electrodes is amultilayer structure of the first ceramic layer and the second ceramiclayer.
 15. The ceramic electronic device as set forth in claim 13,wherein some of said ceramic layers present between pairs of adjoininginternal electrodes are formed of said single ceramic layers alone. 16.The ceramic electronic device as set forth in claim 13, wherein α1<α2.17. The ceramic electronic device as set forth in claim 13, whereinT1+T2≦6 μm.
 18. The ceramic electronic device as set forth in claim 13,comprising a multilayer ceramic capacitor.
 19. A ceramic electronicdevice comprising: a ceramic body comprised of ceramic layers stackedtogether and a plurality of internal electrodes stacked inside saidceramic body via said ceramic layers, wherein at least one of saidceramic layers present between pairs of adjoining internal electrodes isa multilayer structure of a first ceramic layer and a third ceramiclayer, remaining ceramic layers in said ceramic layers present betweenpairs of adjoining internal electrodes is configured by second ceramiclayers alone, and, when a mean particle size of ceramic particles ofsaid first ceramic layer is α1, a thickness of said first ceramic layeris T1, a mean particle size of ceramic particles of said second ceramiclayer is α2, a thickness of said second ceramic layer is T2, a meanparticle size of ceramic particles of said third ceramic layer is α3,and a thickness of said third ceramic layer is T3, the conditions ofα1≦α2, α1 ≦α3, 0.05 μm<α1≦0.35 μm, T1<T2, T1<T3, and 0 μm<T1<1.5 μm aresatisfied.
 20. The ceramic electronic device as set forth in claim 19,wherein α1≦α2 and α1≦α3.
 21. The ceramic electronic device as set forthin claim 19, wherein T1+T3≦6 μm.
 22. The ceramic electronic device asset forth in claim 21, wherein T2≦6 μm.
 23. The ceramic electronicdevice as set forth in claim 21, wherein T1+T3 is substantially equal toT2.
 24. The ceramic electronic device as set forth in claim 19,comprising a multilayer ceramic capacitor.
 25. The ceramic electronicdevice as set forth in claim 19, wherein there is at least one ceramiclayer comprised of said second ceramic layer alone between adjoiningpairs of ceramic layers formed by multilayer structures of said firstceramic layer and third ceramic layer.